Logic Design for Digital Communication Development of Standards Based Physical Layer Modulators and Demodulators in FPGA or ASIC Modulation Formats: OFDM QAM QPSK 8-VSB GSM CPM, PCM-FM Capabilities: Viterbi Decoding, Reed Solomon Decoding, Variable Rate Filtering, Carrier Recovery, Symbol Timing Recovery, Channel Estimation, Equalization, Synchronization, trellis demodulation Standards: IEEE 802.16 (WIMAX) DVB-S, DVB-C, ATSC, DVB-H, GSM/GPRS, GPS, WIMEDIA, ARTM PCM-FM (tier 0) , ARTM SOQPSK-TG (tier 1) System Analysis, Simulation and Algorithm Development: Matlab Implementation: Altera Quartus, Verilog, Matlab |
Michael Paff consultant Mr Paff has extensive experience in developing baseband hardware for satellite communication, cable modems, cellular and fixed wireless systems. He is capable in system design, modulator/demodulator implementation and forward error correction implementation. He holds patents in the areas of cable modem and satellite receiver and OFDM technology. He has participated in cable modem standards process and IEEE 802.16a standards activity. He has a BSEE from Bucknell University and an MSEE from Syracuse University. Mr Paff is a strong believer in FPGA verification of complex communication algorithms. In fact, FPGAs have replaced full ASIC in many communication applications with lower cost and shorter design time. Mr. Paff has developed a large inventory of communication IP based on Altera technology. This IP is based on Verilog and is easily ported to other technology. Mr Paff can augment your design team by providing existing logic IP cores for modules such as Viterbi Decoder, Reed Solomon, OFDM modulator/demodulator, variable rate RRC filter, trellis demodulator or ATSC transmitter. He can implement a custom module to your specifications. He can provide system engineering support or help troubleshoot immediate problems. |
mpaff@paffengineering.com 650 941 2954 or 650 704 9645 (cell) Los Altos CA 94024 |